Bayesian Programming

Probability as an extension of logic


A need for new hardware

The glorious era of von Neumann architectural computers is behind us. This type of machine has reached its limits, both in terms of technology and applications. There is a lot of excitement (rebooting computing) in the world of information processing to try to imagine and develop alternative concepts. 

We propose in the Bayesian Programming project with the start-up an original way whose objective is to develop and promote mathematical methods, algorithms, electronic components, circuits, integrated devices and machines for probabilistic artificial intelligence. 

Twenty years of fundamental research in various laboratories, funded by several European projects, has led to a very successful design of these architectures based on both solid theoretical foundations and successful experiments. 

Three development axes are planned: 

1. (B)ASIC : The short-term objective (3 years) is to propose specific probabilistic circuits (Bayesian-ASIC), very low power consumption, suitable for integration into intelligent objects to process sensor information and time series to PERCEIVE and SYNTHESIZE

2. (B)PU : The medium-term objective (5 years) is to design a Bayesian Processing Unit architecture to increase a computer’s ability to perform Monte Carlo simulations in order to PREDICTANTICIPATE and DECIDE

3. (B)LEARN : The longer-term objective (7 years) is to enrich previous architectures by placing mechanisms for LEARNING and ADAPTATION at the very heart of their material conceptions. 

While we have long defended the vision that probabilities are the foundation of the AI of the future as an extension of logic and complement to neural networks and deep learning, we have very recently been joined by Intel, including the CTO, Mike Mayberry, who states that probabilities will be the 3rd  wave of AI. He has just launched a probabilistic computing program at Intel whose objective is “to develop technology that integrates probabilistic models and Monte Carlo inference into programming languages, compilers, runtime systems, and microarchitecture“. 

An interesting analogy can be made with the development of GPUs. GPUs are integrated circuits for efficient image management. Pixels and pixel sets are manipulated directly at the hardware level in a massively parallel manner. They are used in all aspects of still or moving image processing, 2D or 3D, real or virtual. 30 years ago they didn’t exist when NVIDIA and ATI (now AMD) invented them, they are now indispensable and present everywhere. They are available in the form of programmable co-processors or dedicated circuits. We think it will be the same with the circuits for probabilistic AI. The purpose of (B)PUs is to simulate and evaluate a very large number of scenarios and assumptions in order to be able to make decisions based on these predictions. The probability distributions in (B)PUs are manipulated by the hardware in an even more massively parallel way than the pixels by the GPUs. They will be essential wherever we need to perceive and act. is a unique multidisciplinary meeting of specialists in nanotechnology, electronics, computer science, artificial intelligence, mathematics and theoretical biology, not to mention a very important experience in creating successful start-ups. 

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